System of NULL Convention Logic for Ultra-Low Power Applications

Abstract

Leakage power is becoming a major design challenge for circuit designers as transistor feature sizes shrink into the ultra-deep submicron range. This review article focuses on the application of Multi- Threshold NULL Convention Logic (MTNCL), an asynchronous design paradigm, to adaptive beamforming circuits MTNCL, also known as Sleep Convention Logic (SCL), is a type of logic that combines Multi-Threshold CMOS (MTCMOS) and NULL Convention Logic (NCL) to achieve significant power savings while avoiding the limitations of synchronous circuits. The MTNCL and synchronous designs were constructed using IBM's 130 nm bulk CMOS technology for power and area comparison. The MTNCL design outperformed the synchronous design in terms of active energy and leakage power. The MTNCL circuit enables delay-insensitive logic operation while minimizing leakage power and active energy consumption. For even more power savings, the MTNCL circuit can function successfully under extreme supply voltage scaling down to the sub-threshold zone. Four MTNCL topologies and four MTNCL threshold gate designs enable asynchronous logic design, allowing for glitch-free, ultra-low-power, and speedier circuits.